MCU clock system.
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#include <jsapi.h>
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_Bool | SetSystemClock (unsigned hsi_mhz, _Bool hsi_div2, unsigned hse_mhz, _Bool hse_bypass, unsigned pll_mhz, unsigned flash_ws) |
| Initialize the system clock. Automatically set WAIT STATE to 1 if the SYSCLK is > 24 MHz. More...
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_Bool | SetSystemClock (unsigned hsi_mhz, _Bool hsi_div2, unsigned hse_mhz, _Bool hse_bypass, unsigned pll_mhz) |
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unsigned | GetSysClkFreq (void) |
| Return the SYSCLK frequency. More...
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enum CLOCK_SRC | GetCurrentClockSource (void) |
| Return the current clock source. More...
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void | RCC_GetClocksFreq (JSAPI_ClocksTypeDef *RCC_Clocks) |
| Get the frequencies of various clocks in the system. More...
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void | GetClockFactors (int *ahbdiv, int *apbdiv, int *timmul) |
| Get the divide factors for various clocks. Null pointers can be passed if they are "don't care". More...
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int | SetClockFactors (int ahbdiv, int apbdiv) |
| Set the various clock dividers. More...
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void | SetMCO (enum MCO_SOURCE source, unsigned div_factor, struct JSAPI_GPIO *port, unsigned pin_no, unsigned af) |
| Set the MCO source. More...
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void JSAPI_CLOCK::GetClockFactors |
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int * |
ahbdiv, |
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int * |
apbdiv, |
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int * |
timmul |
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Get the divide factors for various clocks. Null pointers can be passed if they are "don't care".
- Parameters
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ahbdiv | divfactor SYSCLK -> HCLK |
apbdiv | divfactor HCLK -> APBCLK/PCLK |
timmul | 1x or 2x PCLK |
enum CLOCK_SRC JSAPI_CLOCK::GetCurrentClockSource |
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void |
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Return the current clock source.
- Returns
- one of the "enum CLOCK_SRC" values.
unsigned JSAPI_CLOCK::GetSysClkFreq |
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void |
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Return the SYSCLK frequency.
- Returns
- SYSCLK frequency.
Get the frequencies of various clocks in the system.
- Parameters
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[out] | RCC_Clocks | structure to store the clock frequencies. |
int JSAPI_CLOCK::SetClockFactors |
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int |
ahbdiv, |
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int |
apbdiv |
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Set the various clock dividers.
- Parameters
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ahbdiv | divfactor SYSCLK -> HCLK. [1-512], must be a power of 2. |
apbdiv | divfactor HCLK -> APBCLK. [1-16], must be a power of 2. |
void JSAPI_CLOCK::SetMCO |
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enum MCO_SOURCE |
source, |
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unsigned |
div_factor, |
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struct JSAPI_GPIO * |
port, |
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unsigned |
pin_no, |
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unsigned |
af |
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Set the MCO source.
- Parameters
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source | one of the "enum MCO_SOURCE" values. |
div_factor | 1, 2, 4, 8, ... 128 (power of 2) |
port | GPIO port of the MCO |
pin_no | pin number of the MCO |
af | alternate function code to set the GPIO/pin to generate the MCO |
_Bool JSAPI_CLOCK::SetSystemClock |
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unsigned |
hsi_mhz, |
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_Bool |
hsi_div2, |
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unsigned |
hse_mhz, |
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_Bool |
hse_bypass, |
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unsigned |
pll_mhz, |
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unsigned |
flash_ws |
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Initialize the system clock. Automatically set WAIT STATE to 1 if the SYSCLK is > 24 MHz.
- Parameters
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hsi_mhz | if nonzero, then the internal 8Mhz clock is used, unless hse_mhz is nonzero. |
hsi_div2 | divide HSI by 2 for PLL. Note: not all F0xx includes the DIV2 circuitry. For example, F030x4, F030x6, F030x8 have DIV2, but F030xC, F070x6, F070xB do NOT. please check the reference manual careful on this aspect. You MUST specify this parameter for your target correctly. |
hse_mhz | if nonzero, then the parameter is always used as the HSE clock, and hsi_mhz is ignored. |
hse_bypass | set to nonzero if hardward HSE bypass is used. |
pll_mhz | the desired clock speed using the PLL. If zero, then PLL is not used. The actual achieveable PLL MHz may be less. |
flash_ws | flash wait state, dependent on the HCLK. If the HCLK (SYSCLK / AHB prescaler) > 24 Mhz, then it should be set to 1. |
The documentation for this class was generated from the following file: