The “M Profile” of the ARM architecture may very well be the 8051 of the 2010s as the Cotex M0, M3 and now the M4 cores are licensed by just about every silicon microcontroller makers. This presents a nice opportunity for us to provide our ICC compiler tools to the users.
One of the nicest things about Cortex is that ARM Ltd. finally defined standard interrupt controller and system memory map so it’s much easier to port software between different Cortex devices from different manufacturers – well, at least that’s the theory. It may not be as rosy in practice but clearly the situation is vastly improved over the last mass-market ARM devices based on the older ARM7TDMI core.
In house, we have a prototype instruction set Cortex simulator running, which is crucial in bringing up the compiler (it’s much easier to run massive number of tests on the simulator than on bare metal) and we even have a prototype of the the V8 CodeBlocks IDE supporting some kind of Cortex operations. None of these is anywhere near prime time of course, but the foundation is there.
The Cortex core is similar to the ARM7TDMI architecture which we already support in our ICCARM product. However, we have decided to rewrite the assembler and linker, to better fit with our product architecture. While this does add additional resource to the project, we do believe that this will have a positive impact in our future development and maintenance strategy.
The good news is that the assembler is now able to consume almost all of the Cortex “Thumb” and “Thumb2” instructions. The assembler and linker are based on our time proven tools that we developed since 2000 so once we got the ball rolling, it should not take much time to finish it to a production stage.
The compiler is actually the easier part, as it is very similar to the ARM compiler. It will mostly be a matter of ripping out the If-conversion and to eliminating Thumb mode and interworking.
Our goal is still to release a beta version of ICC Cortex by the end of 2011. Stay tuned for further details.